The structure of a silicon chip is complex. This applies to both its surface and its internal three-dimensional composition. The chip is made up of many layers, each of which contains a detailed pattern. Some of the layers lie within the silicon wafer and others are stacked on top. The manufacturing process involves forming this sequence of layers very precisely.
In the planar process for the production of integrated circuits all steps in the manufacture are performed on the surface of a silicon crystal (i.e. in a single plane). This process is widely used in the manufacture of nearly all today's ICs.
Although hundreds of ICs are built on a wafer, we will only consider the fabrication of small piece of a chip - an individual nMOS transistor to illustrate the basics of the manufacturing process.
The positively doped silicon wafer (substrate) is covered initially with an insulating layer of silicon dioxide SiO2 via a chemical process called oxidation. The silicon wafer is exposed to extreme heat and pure oxygen and the oxide is deposited over the surface. The SiO2 protects the surface and provides an insulating layer on to which other layers may be deposited and patterned.
The detailed patterns are created on the layers of the silicon dioxide using a technique called photolithography. Each layer on the chip uses a mask with a different pattern.
The wafer is coated with a thin layer of light-sensitive material - photoresist, which changes when exposed to ultraviolet (UV) light. UV light is then passed through a suitably patterned mask onto the silicon wafer. The mask shields parts of the wafer from the light. The unprotected and exposed photoresist polymerizes and becomes soft and soluble, while shielded areas remain unaffected.
The exposed (soft) photoresist is removed by washing with a solvent. The exposed silicon dioxide is etched away with chemicals (hydrofluoric acid) so creating a "window" to the wafer's surface with the shape as defined by the mask. This window determines transistor's active area - the place where the gate, source and drain will be implemented. Finally the remaining resist can be removed, leaving the pattern that was on the mask transferred to the oxide.
This kind of photoresist is called a positive resist. There are also negative resists where the unexposed resist is dissolved by the solvent.
To begin another layer, a second, thinner layer of SiO2 is deposited over the entire chip surface. Then a layer of polysilicon and another layer of photoresist are applied. UV light is passed through a second mask, exposing a new pattern on the photoresist. The exposed photoresist is dissolved with solvent. The unprotected polysilicon and thin oxide are then etched away with chemicals. As a result, two windows are created to the wafer's surface into which n-type impurities are added to form the source and drain. The remaining photoresist is then removed leaving a ridge of polysilicon, which serves as the transistor's gate.
Doping (Ion Implantation)
The exposed areas of the wafer are then "doped" with impurities, introducing atoms of boron (B) or phosphorus (P), for example, to form positive and negative conducting regions. The doping atoms are ionized (one or more of their electrons are removed) and accelerated to a high energy.
The ions bombard the silicon wafer and penetrate the windows etched into the protective oxide layer. Phosphorus ions (in this case) are implanted within the silicon and create n-wells for source and drain regions. The process is called ion implantation (or doping). The depth and concentration of these impurities determine the specific electrical characteristics of the chip.
The layering and masking processes are repeated, creating windows that allow connections to be made between the layers. Thick oxide is again deposited over the whole wafer. It is then masked with photoresist and etched to expose the areas that will contain metal contacts for the polysilicon gate and the drain and source wells.
Atoms of metal (aluminum) are deposited over the whole wafer, filling the contact areas. This metal layer is then masked, and etched to leave strips of the metal for electrical wiring on the surface. The process is called metalization.
In the fabrication of finely patterned devices, extremely precise control of the entire process is required. At each step of the process, wafers are tested with specially designed equipment. No human hand is allowed to touch a wafer. Staff members are clothed in "astronaut-like suits" that cover them from top to toe.
All operations are performed by computer-controlled equipment in "clean rooms", where the air is continuously filtered and circulated to keep the dust level at an absolute minimum. If only a single particle of dust infiltrates the clean room, it can destroy an entire chip.
In reality, making chips is much more complex process and demands many more steps. Transistors are produced along with millions of neighbors on the wafer. Consequently, hundreds of identical chips may be created on a single wafer.
All chips that pass the precise electrical tests are then sliced from the wafer using high-speed, water-cooled diamond saws and are mounted in metal, plastic or ceramic packages, as shown in the illustration. The chip is then connected into a package using gold bonding wires, which attach the IC to the leads as shown in the illustration.
Chip packaging is of prime importance for isolating the circuit effectively from its environment and facilitating the use of ICs in electronic systems. The most common of a wide range of packages are:
Integrated Circuit Applications
Complementary MOS (CMOS) is recognized as the leading VLSI systems technology. CMOS ICs combine both n-channel and p-channel MOSFETs. The illustration shows the basic idea.
The circuit is similar to a class B amplifier - when one device is on, the other is off, and vice versa. Because both devices are in series, the current is determined by the leakage in the off device. Thus the key advantage of CMOS is its extremely low power consumption (measured in nanowatts). That is why these circuits are popular in satellites, almost all microprocessors, memory, battery-powered applications such as calculators, digital cameras, mobile phones, etc.
The CMOS structure consists of n-type substrate in which p-type devices are formed by suitable masking and doping. In order to house an n-type device a deep p-well is produced in the n-substrate. The p-well acts as a substrate for the n-transistors within the native p-substrate. These two substrate areas need to be electrically isolated. Two substrate connections (UDD and USS) are required as shown in the illustration.
There are a number of approaches to CMOS fabrication, including the p-well, n-well and the silicon-on-insulator process. The p-well process will be considered in a brief overview since it is widely used in practice. The basic processing steps are of the same nature as those used in nMOS.
A deep p-well is produced in the n-substrate. The active regions for both pMOS and nMOS transistors are then defined. After the thin oxide the polysilicon layer is deposited and etched. A p-plus mask is used to define all areas where p-type doping is to take place. Afterwards a negative form of the same mask defines those areas where n-type doping is required.
For analog applications bipolar ICs are used to provide better performing analog functions. We will consider a brief overview of bipolar technology with a simplified treatment of the steps in the manufacturing process.
The wafers (p substrate) are put into a furnace. A gas mixture of silicon atoms and donor impurities (such as P or As) are passed over the wafers at high temperature. A thin layer of n-single-crystal silicon (called an epitaxial layer) grows on the silicon surface. The process is called epitaxy. Then a layer of SiO2 covers the surface during oxidation.
IC Bipolar Transistor Fabrication
The illustration shows the main steps in making an integrated bipolar transistor.
Part of the SiO2 is etched away, exposing the epitaxial layer. The wafer is then put into furnace and atoms of acceptor impurities (such as B or Ga) are diffused into the epitaxial layer. Thus an island of n material is created in the p substrate. In this island the transistor will be formed.
The processes of oxidation, photolithography, etching, and doping are repeated many times to build the transistors and other electronic components that make up each chip on a wafer.
At the same time as transistors, diodes, resistors, and capacitors can be easily fabricated on a chip using some of the operations shown in the illustration. One problem is that high value resistors and capacitors occupy a large area. For this reason it is not practical to integrate large capacitors and inductors on the surface of a chip.
Once the electronic components have been fabricated in the silicon, thin metallic films are added to form the interconnections among transistors and other devices.
PN Junction Isolation
The illustration shows a simple IC with three components. When many transistors (or other devices) are fabricated in a single silicon chip they must be electrically isolated from one another.
A commonly used isolation technique utilizes a reverse-biased pn-junction. This usually requires that the substrate be connected to the most negative voltage. Then depletion layers exist between the p-substrate and the three n-islands that touch it. Because the depletion layers have essentially no current carriers, the integrated components are effectively isolated from one to other. This kind of insulation is known as depletion-layer isolation.
MOS Versus Bipolar Technology
What Is An Integrated Circuit?
Individually packaged devices (such as diodes and transistors) are referred to as discrete components. They are connected with other devices in a circuit to form a functional unit.
An integrated circuit (IC), sometimes called a chip or microchip, is defined as a combination of interconnected circuit elements inseparably associated and formed on or within a single substrate (mounting-surface). In ICs thousands or millions of tiny transistors, diodes, resistors, and capacitors are fabricated as a unit and packaged in a single case. The entire circuit is treated as a single device.
There are three types of integrated circuits classified according to the technology used for their fabrication: monolithic, film, and hybrid.
Monolithic integrated circuits are those that are formed completely within a semiconductor substrate. These ICs are commonly referred to as silicon chips. They can be bipolar or MOS, depending on the type of transistors they contain. Mixed ICs also exist, which combine both bipolar and MOS transistors. The actual IC is formed on a single piece of silicon about the size of a pinhead. Such miniaturization permits production of ever smaller consumer products.
Film Integrated Circuits
Film integrated circuits are larger than monolithic ICs but smaller than discrete circuits. Film components are made of either conductive or non-conductive material that is deposited in desired patterns onto a ceramic or glass substrate. Film integrated circuits are broken down into two categories, thin film and thick film according to the thickness of the film layer. Film can only be used for passive circuit components, such as resistors and capacitors. Transistors and/or diodes are added as discrete components to the substrate to complete the circuit.
Hybrid Integrated Circuits
Hybrid integrated circuits either combine two or more integrated circuit types or combine one or more integrated circuit types with discrete (separate) components. The illustration shows examples of hybrid circuits, consisting of film components, silicon chips and discrete transistors, inductors and capacitors mounted over an insulator substrate. Hybrid ICs are widely used for high-power audio amplifier applications.
Digital and Linear Integrated Circuits
Most ICs manufactured today are designed so that they can be used in a wide variety of applications. ICs may be classified as either digital or linear.
Linear ICs have continuously variable output, where the output signal level is a linear function of the input signal level. Linear ICs are used in analog-type circuits such as audio amplifiers, voltage regulators, operational amplifiers, radio frequency circuits, etc.
Digital ICs operate with only a few defined levels or states rather than over a continuous range of signal amplitudes. They are used in computers, computer networks, calculators, digital clocks and many other applications.
From SSI to VLSI
Because of revolutionary advances in IC technology, the number of transistors that can be commercially integrated on a single chip has risen from 2 to more than 500 000 in just over two decades. IC circuits of such complexity employ VLSI (very-large-scale integration). This rapid rate of growth was predicted by Gordon Moore and is known as Moore's Law. The law is illustrated by the evolution of Intel microprocessors.
Monolithic ICs are the most common type of IC. They are built in layers on a silicon wafer - a round slice of silicon ranging from 6 to 8 inches (150 mm to 200 mm) in diameter with a thickness about that of a credit card. Since ICs are extremely small, a manufacturer can place hundreds of them on a single wafer and fabricate many wafers simultaneously. This mass production is the reason for the low cost of ICs.
Play and Learn nMOS Technology
CMOS and nMOS are currently the leading integrated circuit technologies. Regardless of how complicated a circuit may be, producing it is mainly a process of oxidation, photolithography, etching windows, doping for n and p regions and connecting the integrated components.
Play and Learn nMOS transistor fabrication allows you to become more familiar with basic processes in IC manufacturing. Observe the operations step by step or see view whole process.
Processing takes place on a p-doped silicon wafer. It is first coated with "thick" layer of SiO2 in a process called oxidation.
The first mask patterns the SiO2 to expose the silicon surface in areas where thin oxide is to be deposited. For this reason the mask is often known as the "thinox" mask.
The second mask patterns the polysilicon. First thin oxide is deposited over the whole wafer. Afterwards a layer of polysilicon is deposited onto the SiO2 and then patterned using the second mask. The same mask is used to remove the thin oxide layer where it is not covered by polysilicon.
Doping (ion implantation or diffusion) is performed to form source and drain for transistors in areas where thin oxide is removed.
The third mask is used to etch for contact cuts. Thick oxide is deposited on the whole wafer and then is etched for contact cuts.
The fourth mask patterns metal interconnections. Metal is deposited over the whole wafer and then patterned to form metal connections.
As a final step (not shown), the wafer is passivated and openings to the bond pad are etched to allow for wire bonding.