Tаймер

Модел на програмируем таймер

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity timer is
    generic (N : integer);
    port ( clk : in std_logic;
           reset : in std_logic;
           load : in std_logic;
           delay : in std_logic_vector (N-1 downto 0);
           time_over : out std_logic);
end timer;

architecture behavioral of timer is
    signal cnt: unsigned(N-1 downto 0);
    signal stop : std_logic;
begin
    process (clk, reset)
    begin
        if reset = '1' then
            cnt <= (others=>'0');
        elsif rising_edge(clk) then
            if( load = '1') then
                cnt <= unsigned(delay);
            elsif (stop = '1')then
                cnt <= cnt;
            else
                cnt <= cnt - 1;
            end if;
        end if;
    end process;
    stop <= '1' when cnt = 0 else '0';
    time_over <= stop;
end behavioral;

Тест

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity timer_tb is
end timer_tb;
 
architecture behavior of timer_tb is 
    
   --inputs
   signal clk : std_logic := '0';
   signal reset : std_logic;
   signal load : std_logic;
   signal delay : std_logic_vector(7 downto 0);

 	--outputs
   signal time_over : std_logic;

   -- clock period definitions
   constant clk_period : time := 10 ns;
 
begin
 
	-- instantiate the unit under test (uut)
   uut:entity work.timer(behavioral)
        generic map (n => 8)
        port map (
          clk => clk,
          reset => reset,
          load => load,
          delay => delay,
          time_over => time_over
        );

   -- clock process definitions
   clk_process :process
   begin
		clk <= '0';
		wait for clk_period/2;
		clk <= '1';
		wait for clk_period/2;
   end process;
 

   -- stimulus process
   stim_proc: process
   begin		
      reset <= '1';
      wait for clk_period*2;
      
      reset <= '0';
      delay <= "00010000";
      load <= '0';
      wait for clk_period*1;
      load <= '1';
      wait for clk_period*1;
      load <= '0';
      wait for clk_period*20;

      delay <= "00100000";
      load <= '1';
      wait for clk_period*1;
      load <= '0';
      wait for clk_period*256;
      
      wait;
   end process;

end;

Симулация